1. Field of the Invention
The present invention relates to a semiconductor device.
Priority is claimed on Japanese Patent Application No. 2011-090200, filed Apr. 14, 2011, the content of which is incorporated herein by reference.
2. Description of the Related Art
In recent years, to achieve high speed, high density, and multiple functionality in semiconductor devices, research and development have been done in chip-on-chip (hereinafter, CoC) technology, by which a plurality of semiconductor chips are stack-mounted onto a wiring substrate. The CoC technology is also referred to as multichip packaging (hereinafter, MCP) technology.
A semiconductor device using the MCP technology (hereinafter, MCP semiconductor device) includes a wiring substrate and a plurality of semiconductor chips stack-mounted onto the wiring substrate. The plurality of semiconductor chips are connected by flip-chip connection or by wire bonding connection (see, for example, Japanese Patent Laid-Open Publication No. 2010-45166).
In general, the wiring substrate used in an MCP semiconductor device includes: a main substrate; a first wiring pattern disposed on one surface of the main substrate and electrically connected to a semiconductor memory chip via bonding wires; a second wiring pattern (a pattern of wires, land portions, and the like) that is disposed on the other surface of the main substrate, and onto which external connection terminals (for example, solder balls) are disposed; and through electrodes which penetrating the main substrate and which are connected to the first and second wiring patterns.
In the case of stack-mounting a plurality of semiconductor memory chips onto a wiring substrate configured in this manner, it is necessary to branch the wires for signals such as I/O. For this reason, the influence of multiple reflections causes deterioration of quality of the waveforms of data signals.
In other words, in the above MCP semiconductor device, depending upon the sequence of stacking the semiconductor chips onto the wiring substrate and the wiring topology of the wiring substrate, there has been the problem of deterioration of the data signal quality.